In typical data processors, the instruction set is designed to perform useful operations in a target application. In general, the task of verifying functionality of the data processor is left to the manufacturer. However, the user of the data processor, while expecting fully functional units, does not wish to sacrifice any portion of the instruction set to instructions which simplify the manufacturer's testing requirements but otherwise perform no useful function in the target system. As a result, manufacturers have devised various techniques for inducing the data processor to enter into a special "test mode" wherein the processor exposes the workings of its internals during the execution of "user" instructions. Using sophisticated testing systems, the manufacturer could thus view in detail the execution of each instruction by the data processor before shipment to the user. Unfortunately, as the power of the data processor is expanded to include new functions, the cost of the data processor increases not only because of the additonal hardware necessary to implement these new functions but also because of the cost of testing each new function. In extreme cases, the cost of testing may exceed the cost of the added hardware. Accordingly, manufacturers strive to make each new function as testable as possible. Although in some situations, instructions can be useful in testing other functions, such instructions are expected to perform "as usual", i.e. just as in the user application. No known data processor has an instruction which performs differently while the data processor is in the test mode than when the processor is in the normal execution mode.